Some thoughts about the new v7 style system

General discussion
1

I was working on a v6 project and planning to migrate to v7. Recently, I did some study to the v7.
The new style system is powerful and flexible. But it comes at an expense of computational time(many linear search) and likely higher RAM usage.
It may be fine for medium to high-end MCU like M4 and ESP32. But for the low budget one like SAMD21 M0 48MHz with 32KB RAM, that matters.
For my project, in order to squeeze as many RAM and processing power from SAMD21, I probably keep using v6 with it.

There are always tradeoffs between memory efficiency, processing efficiency and flexibility. I can see that this new style system focus mainly on flexibility, but this is not really a favor for budget embedded system. I have some suggestions.

For memory efficiency, allow style to be declared as constant. Using Marco to build up the style map, instead of run-time build up.
For processing efficiency, may implement some hybrid index mapping, some property use direct index, and the remaining use map.

1 Like
2

Hi,

Thank you very much for the feedback!

True, it’s really slower. To mitigate this a caching mechanism was added. Please try with the latest version.

Regarding the size, I believe the new style system has a smaller memory footprint because it stores only the properties it really needs.

That’s a great idea. I’m thinking about it.