New Zedboard LVGL, FreeRTOS (+TCP +FAT) and USB template project available on Github

Hi All,

I have finally managed to get around to posting a Zedboard(AMD Xilinx Zynq7000 SOC) template project on Github for LVGL and FreeRTOS. It includes an FPGA based(Verilog) VGA controller which is hooked up to the onboard VGA 15 pin connector. The software includes code to drive both ARM cores with an instance of FreeRTOS including boot loader, SD card file system, Ethernet and basic USB peripheral support. LVGL, the TCP stack, and the FAT file system all run on ARM core 0, with ARM core 1 just driving the onboard OLED display but is ready to take some more user tasks running in the second instance of FreeRTOS. In my own projects I have used core 1 to interact with specialist hardware implemented in the FPGA fabric and then shared data with the user interface parts on Core 0 via shared memory.

The readme is here.

I hope the project can provide a useful kick start for those working with this type of powerful SOC device.

Kind Regards,

Pete

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